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These reduce stack usage in dml30_ModeSupportAndSystemConfigurationFull enough to fix compile on clang 22. Signed-off-by: Ophestra <cat@gensokyo.uk>
1275 lines
54 KiB
Go
1275 lines
54 KiB
Go
package rosa
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import "hakurei.app/internal/pkg"
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const kernelVersion = "6.12.76"
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var kernelSource = pkg.NewHTTPGetTar(
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nil, "https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/"+
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"snapshot/linux-"+kernelVersion+".tar.gz",
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mustDecode("h0UATNznQbzplvthAqNLjVF-DJQHzGyhiy4za-9Ig9tOIpnoH9mWHbEjASV6lOl2"),
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pkg.TarGzip,
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)
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func (t Toolchain) newKernelSource() (pkg.Artifact, string) {
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return t.New("kernel-"+kernelVersion+"-src", 0, nil, nil, nil, `
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mkdir -p /work/usr/src/
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cp -r /usr/src/linux /work/usr/src/
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chmod -R +w /work/usr/src/linux/
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`, pkg.Path(AbsUsrSrc.Append("linux"), false, kernelSource)), kernelVersion
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}
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func init() {
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artifactsM[KernelSource] = Metadata{
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f: Toolchain.newKernelSource,
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Name: "kernel-source",
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Description: "a writable kernel source tree installed to /usr/src/linux",
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Website: "https://kernel.org/",
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}
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}
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func (t Toolchain) newKernelHeaders() (pkg.Artifact, string) {
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return t.NewPackage("kernel-headers", kernelVersion, kernelSource, &PackageAttr{
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Flag: TEarly,
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}, &MakeHelper{
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SkipConfigure: true,
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SkipCheck: true,
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Make: []string{
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"-f /usr/src/kernel-headers/Makefile",
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"O=/tmp/kbuild",
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"LLVM=1",
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`HOSTLDFLAGS="${LDFLAGS:-''}"`,
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"INSTALL_HDR_PATH=/work/system",
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"headers_install",
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},
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Install: "# headers installed during make",
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},
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Rsync,
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), kernelVersion
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}
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func init() {
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artifactsM[KernelHeaders] = Metadata{
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f: Toolchain.newKernelHeaders,
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Name: "kernel-headers",
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Description: "an installation of kernel headers",
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Website: "https://kernel.org/",
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}
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}
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func (t Toolchain) newKernel() (pkg.Artifact, string) {
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return t.NewPackage("kernel", kernelVersion, kernelSource, &PackageAttr{
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Env: []string{
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"PATH=/system/sbin",
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},
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ScriptEarly: `
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install -Dm0400 \
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/usr/src/.config \
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/tmp/kbuild/.config
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install -Dm0500 \
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/usr/src/.installkernel \
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/sbin/installkernel
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`,
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Paths: []pkg.ExecPath{
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pkg.Path(AbsUsrSrc.Append(
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".config",
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), false, pkg.NewFile(".config", kernelConfig)),
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pkg.Path(AbsUsrSrc.Append(
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".installkernel",
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), false, pkg.NewFile("installkernel", []byte(`#!/bin/sh -e
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echo "Installing linux $1..."
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cp -av "$2" "$4"
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cp -av "$3" "$4"
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`))),
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},
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Patches: [][2]string{
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{"f54a91f5337cd918eb86cf600320d25b6cfd8209", `From f54a91f5337cd918eb86cf600320d25b6cfd8209 Mon Sep 17 00:00:00 2001
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From: Nathan Chancellor <nathan@kernel.org>
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Date: Sat, 13 Dec 2025 19:58:10 +0900
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Subject: drm/amd/display: Reduce number of arguments of dcn30's
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CalculatePrefetchSchedule()
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After an innocuous optimization change in clang-22,
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dml30_ModeSupportAndSystemConfigurationFull() is over the 2048 byte
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stack limit for display_mode_vba_30.c.
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drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:3529:6: warning: stack frame size (2096) exceeds limit (2048) in 'dml30_ModeSupportAndSystemConfigurationFull' [-Wframe-larger-than]
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3529 | void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
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| ^
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With clang-21, this function was already close to the limit:
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drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:3529:6: warning: stack frame size (1912) exceeds limit (1586) in 'dml30_ModeSupportAndSystemConfigurationFull' [-Wframe-larger-than]
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3529 | void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
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| ^
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CalculatePrefetchSchedule() has a large number of parameters, which must
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be passed on the stack. Most of the parameters between the two callsites
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are the same, so they can be accessed through the existing mode_lib
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pointer, instead of being passed as explicit arguments. Doing this
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reduces the stack size of dml30_ModeSupportAndSystemConfigurationFull()
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from 2096 bytes to 1912 bytes with clang-22.
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Closes: https://github.com/ClangBuiltLinux/linux/issues/2117
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Signed-off-by: Nathan Chancellor <nathan@kernel.org>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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(cherry picked from commit b20b3fc4210f83089f835cdb91deec4b0778761a)
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---
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.../amd/display/dc/dml/dcn30/display_mode_vba_30.c | 258 ++++++---------------
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1 file changed, 73 insertions(+), 185 deletions(-)
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diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
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index abe51cf3aab2..a244504cc1f2 100644
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--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
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+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
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@@ -77,32 +77,14 @@ static unsigned int dscceComputeDelay(
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static unsigned int dscComputeDelay(
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enum output_format_class pixelFormat,
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enum output_encoder_class Output);
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-// Super monster function with some 45 argument
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static bool CalculatePrefetchSchedule(
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struct display_mode_lib *mode_lib,
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- double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
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- double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
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+ unsigned int k,
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Pipe *myPipe,
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unsigned int DSCDelay,
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- double DPPCLKDelaySubtotalPlusCNVCFormater,
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- double DPPCLKDelaySCL,
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- double DPPCLKDelaySCLLBOnly,
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- double DPPCLKDelayCNVCCursor,
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- double DISPCLKDelaySubtotal,
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unsigned int DPP_RECOUT_WIDTH,
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- enum output_format_class OutputFormat,
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- unsigned int MaxInterDCNTileRepeaters,
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unsigned int VStartup,
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unsigned int MaxVStartup,
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- unsigned int GPUVMPageTableLevels,
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- bool GPUVMEnable,
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- bool HostVMEnable,
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- unsigned int HostVMMaxNonCachedPageTableLevels,
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- double HostVMMinPageSize,
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- bool DynamicMetadataEnable,
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- bool DynamicMetadataVMEnabled,
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- int DynamicMetadataLinesBeforeActiveRequired,
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- unsigned int DynamicMetadataTransmittedBytes,
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double UrgentLatency,
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double UrgentExtraLatency,
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double TCalc,
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@@ -116,7 +98,6 @@ static bool CalculatePrefetchSchedule(
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unsigned int MaxNumSwathY,
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double PrefetchSourceLinesC,
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unsigned int SwathWidthC,
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- int BytePerPixelC,
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double VInitPreFillC,
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unsigned int MaxNumSwathC,
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long swath_width_luma_ub,
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@@ -124,9 +105,6 @@ static bool CalculatePrefetchSchedule(
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unsigned int SwathHeightY,
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unsigned int SwathHeightC,
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double TWait,
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- bool ProgressiveToInterlaceUnitInOPP,
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- double *DSTXAfterScaler,
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- double *DSTYAfterScaler,
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double *DestinationLinesForPrefetch,
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double *PrefetchBandwidth,
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double *DestinationLinesToRequestVMInVBlank,
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@@ -135,14 +113,7 @@ static bool CalculatePrefetchSchedule(
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double *VRatioPrefetchC,
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double *RequiredPrefetchPixDataBWLuma,
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double *RequiredPrefetchPixDataBWChroma,
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- bool *NotEnoughTimeForDynamicMetadata,
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- double *Tno_bw,
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- double *prefetch_vmrow_bw,
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- double *Tdmdl_vm,
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- double *Tdmdl,
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- unsigned int *VUpdateOffsetPix,
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- double *VUpdateWidthPix,
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- double *VReadyOffsetPix);
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+ bool *NotEnoughTimeForDynamicMetadata);
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static double RoundToDFSGranularityUp(double Clock, double VCOSpeed);
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static double RoundToDFSGranularityDown(double Clock, double VCOSpeed);
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static void CalculateDCCConfiguration(
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@@ -810,29 +781,12 @@ static unsigned int dscComputeDelay(enum output_format_class pixelFormat, enum o
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static bool CalculatePrefetchSchedule(
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struct display_mode_lib *mode_lib,
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- double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
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- double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
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+ unsigned int k,
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Pipe *myPipe,
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unsigned int DSCDelay,
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- double DPPCLKDelaySubtotalPlusCNVCFormater,
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- double DPPCLKDelaySCL,
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- double DPPCLKDelaySCLLBOnly,
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- double DPPCLKDelayCNVCCursor,
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- double DISPCLKDelaySubtotal,
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unsigned int DPP_RECOUT_WIDTH,
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- enum output_format_class OutputFormat,
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- unsigned int MaxInterDCNTileRepeaters,
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unsigned int VStartup,
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unsigned int MaxVStartup,
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- unsigned int GPUVMPageTableLevels,
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- bool GPUVMEnable,
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- bool HostVMEnable,
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- unsigned int HostVMMaxNonCachedPageTableLevels,
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- double HostVMMinPageSize,
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- bool DynamicMetadataEnable,
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- bool DynamicMetadataVMEnabled,
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- int DynamicMetadataLinesBeforeActiveRequired,
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- unsigned int DynamicMetadataTransmittedBytes,
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double UrgentLatency,
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double UrgentExtraLatency,
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double TCalc,
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@@ -846,7 +800,6 @@ static bool CalculatePrefetchSchedule(
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unsigned int MaxNumSwathY,
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double PrefetchSourceLinesC,
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unsigned int SwathWidthC,
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- int BytePerPixelC,
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double VInitPreFillC,
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unsigned int MaxNumSwathC,
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long swath_width_luma_ub,
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@@ -854,9 +807,6 @@ static bool CalculatePrefetchSchedule(
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unsigned int SwathHeightY,
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unsigned int SwathHeightC,
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double TWait,
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- bool ProgressiveToInterlaceUnitInOPP,
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- double *DSTXAfterScaler,
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- double *DSTYAfterScaler,
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double *DestinationLinesForPrefetch,
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double *PrefetchBandwidth,
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double *DestinationLinesToRequestVMInVBlank,
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@@ -865,15 +815,10 @@ static bool CalculatePrefetchSchedule(
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double *VRatioPrefetchC,
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double *RequiredPrefetchPixDataBWLuma,
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double *RequiredPrefetchPixDataBWChroma,
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- bool *NotEnoughTimeForDynamicMetadata,
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- double *Tno_bw,
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- double *prefetch_vmrow_bw,
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- double *Tdmdl_vm,
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- double *Tdmdl,
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- unsigned int *VUpdateOffsetPix,
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- double *VUpdateWidthPix,
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- double *VReadyOffsetPix)
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+ bool *NotEnoughTimeForDynamicMetadata)
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{
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+ struct vba_vars_st *v = &mode_lib->vba;
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+ double DPPCLKDelaySubtotalPlusCNVCFormater = v->DPPCLKDelaySubtotal + v->DPPCLKDelayCNVCFormater;
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bool MyError = false;
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unsigned int DPPCycles = 0, DISPCLKCycles = 0;
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double DSTTotalPixelsAfterScaler = 0;
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@@ -905,26 +850,26 @@ static bool CalculatePrefetchSchedule(
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double Tdmec = 0;
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double Tdmsks = 0;
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- if (GPUVMEnable == true && HostVMEnable == true) {
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- HostVMInefficiencyFactor = PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData / PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly;
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- HostVMDynamicLevelsTrips = HostVMMaxNonCachedPageTableLevels;
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+ if (v->GPUVMEnable == true && v->HostVMEnable == true) {
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+ HostVMInefficiencyFactor = v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData / v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly;
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+ HostVMDynamicLevelsTrips = v->HostVMMaxNonCachedPageTableLevels;
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} else {
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HostVMInefficiencyFactor = 1;
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HostVMDynamicLevelsTrips = 0;
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}
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CalculateDynamicMetadataParameters(
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- MaxInterDCNTileRepeaters,
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+ v->MaxInterDCNTileRepeaters,
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myPipe->DPPCLK,
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myPipe->DISPCLK,
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myPipe->DCFCLKDeepSleep,
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myPipe->PixelClock,
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myPipe->HTotal,
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myPipe->VBlank,
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- DynamicMetadataTransmittedBytes,
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- DynamicMetadataLinesBeforeActiveRequired,
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+ v->DynamicMetadataTransmittedBytes[k],
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+ v->DynamicMetadataLinesBeforeActiveRequired[k],
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myPipe->InterlaceEnable,
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- ProgressiveToInterlaceUnitInOPP,
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+ v->ProgressiveToInterlaceUnitInOPP,
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&Tsetup,
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&Tdmbf,
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&Tdmec,
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@@ -932,16 +877,16 @@ static bool CalculatePrefetchSchedule(
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LineTime = myPipe->HTotal / myPipe->PixelClock;
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trip_to_mem = UrgentLatency;
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- Tvm_trips = UrgentExtraLatency + trip_to_mem * (GPUVMPageTableLevels * (HostVMDynamicLevelsTrips + 1) - 1);
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+ Tvm_trips = UrgentExtraLatency + trip_to_mem * (v->GPUVMMaxPageTableLevels * (HostVMDynamicLevelsTrips + 1) - 1);
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- if (DynamicMetadataVMEnabled == true && GPUVMEnable == true) {
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- *Tdmdl = TWait + Tvm_trips + trip_to_mem;
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+ if (v->DynamicMetadataVMEnabled == true && v->GPUVMEnable == true) {
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+ v->Tdmdl[k] = TWait + Tvm_trips + trip_to_mem;
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} else {
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- *Tdmdl = TWait + UrgentExtraLatency;
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+ v->Tdmdl[k] = TWait + UrgentExtraLatency;
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}
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- if (DynamicMetadataEnable == true) {
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- if (VStartup * LineTime < Tsetup + *Tdmdl + Tdmbf + Tdmec + Tdmsks) {
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+ if (v->DynamicMetadataEnable[k] == true) {
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+ if (VStartup * LineTime < Tsetup + v->Tdmdl[k] + Tdmbf + Tdmec + Tdmsks) {
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*NotEnoughTimeForDynamicMetadata = true;
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} else {
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*NotEnoughTimeForDynamicMetadata = false;
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@@ -949,39 +894,39 @@ static bool CalculatePrefetchSchedule(
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dml_print("DML: Tdmbf: %fus - time for dmd transfer from dchub to dio output buffer\n", Tdmbf);
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dml_print("DML: Tdmec: %fus - time dio takes to transfer dmd\n", Tdmec);
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dml_print("DML: Tdmsks: %fus - time before active dmd must complete transmission at dio\n", Tdmsks);
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- dml_print("DML: Tdmdl: %fus - time for fabric to become ready and fetch dmd \n", *Tdmdl);
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+ dml_print("DML: Tdmdl: %fus - time for fabric to become ready and fetch dmd \n", v->Tdmdl[k]);
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}
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} else {
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*NotEnoughTimeForDynamicMetadata = false;
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}
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|
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- *Tdmdl_vm = (DynamicMetadataEnable == true && DynamicMetadataVMEnabled == true && GPUVMEnable == true ? TWait + Tvm_trips : 0);
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+ v->Tdmdl_vm[k] = (v->DynamicMetadataEnable[k] == true && v->DynamicMetadataVMEnabled == true && v->GPUVMEnable == true ? TWait + Tvm_trips : 0);
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|
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if (myPipe->ScalerEnabled)
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- DPPCycles = DPPCLKDelaySubtotalPlusCNVCFormater + DPPCLKDelaySCL;
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+ DPPCycles = DPPCLKDelaySubtotalPlusCNVCFormater + v->DPPCLKDelaySCL;
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else
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- DPPCycles = DPPCLKDelaySubtotalPlusCNVCFormater + DPPCLKDelaySCLLBOnly;
|
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+ DPPCycles = DPPCLKDelaySubtotalPlusCNVCFormater + v->DPPCLKDelaySCLLBOnly;
|
|
|
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- DPPCycles = DPPCycles + myPipe->NumberOfCursors * DPPCLKDelayCNVCCursor;
|
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+ DPPCycles = DPPCycles + myPipe->NumberOfCursors * v->DPPCLKDelayCNVCCursor;
|
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|
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- DISPCLKCycles = DISPCLKDelaySubtotal;
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+ DISPCLKCycles = v->DISPCLKDelaySubtotal;
|
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|
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if (myPipe->DPPCLK == 0.0 || myPipe->DISPCLK == 0.0)
|
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return true;
|
|
|
|
- *DSTXAfterScaler = DPPCycles * myPipe->PixelClock / myPipe->DPPCLK + DISPCLKCycles * myPipe->PixelClock / myPipe->DISPCLK
|
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+ v->DSTXAfterScaler[k] = DPPCycles * myPipe->PixelClock / myPipe->DPPCLK + DISPCLKCycles * myPipe->PixelClock / myPipe->DISPCLK
|
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+ DSCDelay;
|
|
|
|
- *DSTXAfterScaler = *DSTXAfterScaler + ((myPipe->ODMCombineEnabled)?18:0) + (myPipe->DPPPerPlane - 1) * DPP_RECOUT_WIDTH;
|
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+ v->DSTXAfterScaler[k] = v->DSTXAfterScaler[k] + ((myPipe->ODMCombineEnabled)?18:0) + (myPipe->DPPPerPlane - 1) * DPP_RECOUT_WIDTH;
|
|
|
|
- if (OutputFormat == dm_420 || (myPipe->InterlaceEnable && ProgressiveToInterlaceUnitInOPP))
|
|
- *DSTYAfterScaler = 1;
|
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+ if (v->OutputFormat[k] == dm_420 || (myPipe->InterlaceEnable && v->ProgressiveToInterlaceUnitInOPP))
|
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+ v->DSTYAfterScaler[k] = 1;
|
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else
|
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- *DSTYAfterScaler = 0;
|
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+ v->DSTYAfterScaler[k] = 0;
|
|
|
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- DSTTotalPixelsAfterScaler = *DSTYAfterScaler * myPipe->HTotal + *DSTXAfterScaler;
|
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- *DSTYAfterScaler = dml_floor(DSTTotalPixelsAfterScaler / myPipe->HTotal, 1);
|
|
- *DSTXAfterScaler = DSTTotalPixelsAfterScaler - ((double) (*DSTYAfterScaler * myPipe->HTotal));
|
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+ DSTTotalPixelsAfterScaler = v->DSTYAfterScaler[k] * myPipe->HTotal + v->DSTXAfterScaler[k];
|
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+ v->DSTYAfterScaler[k] = dml_floor(DSTTotalPixelsAfterScaler / myPipe->HTotal, 1);
|
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+ v->DSTXAfterScaler[k] = DSTTotalPixelsAfterScaler - ((double) (v->DSTYAfterScaler[k] * myPipe->HTotal));
|
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|
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MyError = false;
|
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|
|
@@ -990,32 +935,32 @@ static bool CalculatePrefetchSchedule(
|
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Tvm_trips_rounded = dml_ceil(4.0 * Tvm_trips / LineTime, 1) / 4 * LineTime;
|
|
Tr0_trips_rounded = dml_ceil(4.0 * Tr0_trips / LineTime, 1) / 4 * LineTime;
|
|
|
|
- if (GPUVMEnable) {
|
|
- if (GPUVMPageTableLevels >= 3) {
|
|
- *Tno_bw = UrgentExtraLatency + trip_to_mem * ((GPUVMPageTableLevels - 2) - 1);
|
|
+ if (v->GPUVMEnable) {
|
|
+ if (v->GPUVMMaxPageTableLevels >= 3) {
|
|
+ v->Tno_bw[k] = UrgentExtraLatency + trip_to_mem * ((v->GPUVMMaxPageTableLevels - 2) - 1);
|
|
} else
|
|
- *Tno_bw = 0;
|
|
+ v->Tno_bw[k] = 0;
|
|
} else if (!myPipe->DCCEnable)
|
|
- *Tno_bw = LineTime;
|
|
+ v->Tno_bw[k] = LineTime;
|
|
else
|
|
- *Tno_bw = LineTime / 4;
|
|
+ v->Tno_bw[k] = LineTime / 4;
|
|
|
|
- dst_y_prefetch_equ = VStartup - (Tsetup + dml_max(TWait + TCalc, *Tdmdl)) / LineTime
|
|
- - (*DSTYAfterScaler + *DSTXAfterScaler / myPipe->HTotal);
|
|
+ dst_y_prefetch_equ = VStartup - (Tsetup + dml_max(TWait + TCalc, v->Tdmdl[k])) / LineTime
|
|
+ - (v->DSTYAfterScaler[k] + v->DSTXAfterScaler[k] / myPipe->HTotal);
|
|
|
|
Lsw_oto = dml_max(PrefetchSourceLinesY, PrefetchSourceLinesC);
|
|
Tsw_oto = Lsw_oto * LineTime;
|
|
|
|
- prefetch_bw_oto = (PrefetchSourceLinesY * swath_width_luma_ub * BytePerPixelY + PrefetchSourceLinesC * swath_width_chroma_ub * BytePerPixelC) / Tsw_oto;
|
|
+ prefetch_bw_oto = (PrefetchSourceLinesY * swath_width_luma_ub * BytePerPixelY + PrefetchSourceLinesC * swath_width_chroma_ub * v->BytePerPixelC[k]) / Tsw_oto;
|
|
|
|
- if (GPUVMEnable == true) {
|
|
- Tvm_oto = dml_max3(*Tno_bw + PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor / prefetch_bw_oto,
|
|
+ if (v->GPUVMEnable == true) {
|
|
+ Tvm_oto = dml_max3(v->Tno_bw[k] + PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor / prefetch_bw_oto,
|
|
Tvm_trips,
|
|
LineTime / 4.0);
|
|
} else
|
|
Tvm_oto = LineTime / 4.0;
|
|
|
|
- if ((GPUVMEnable == true || myPipe->DCCEnable == true)) {
|
|
+ if ((v->GPUVMEnable == true || myPipe->DCCEnable == true)) {
|
|
Tr0_oto = dml_max3(
|
|
(MetaRowByte + PixelPTEBytesPerRow * HostVMInefficiencyFactor) / prefetch_bw_oto,
|
|
LineTime - Tvm_oto, LineTime / 4);
|
|
@@ -1041,10 +986,10 @@ static bool CalculatePrefetchSchedule(
|
|
dml_print("DML: Tdmbf: %fus - time for dmd transfer from dchub to dio output buffer\n", Tdmbf);
|
|
dml_print("DML: Tdmec: %fus - time dio takes to transfer dmd\n", Tdmec);
|
|
dml_print("DML: Tdmsks: %fus - time before active dmd must complete transmission at dio\n", Tdmsks);
|
|
- dml_print("DML: Tdmdl_vm: %fus - time for vm stages of dmd \n", *Tdmdl_vm);
|
|
- dml_print("DML: Tdmdl: %fus - time for fabric to become ready and fetch dmd \n", *Tdmdl);
|
|
- dml_print("DML: dst_x_after_scl: %f pixels - number of pixel clocks pipeline and buffer delay after scaler \n", *DSTXAfterScaler);
|
|
- dml_print("DML: dst_y_after_scl: %d lines - number of lines of pipeline and buffer delay after scaler \n", (int)*DSTYAfterScaler);
|
|
+ dml_print("DML: Tdmdl_vm: %fus - time for vm stages of dmd \n", v->Tdmdl_vm[k]);
|
|
+ dml_print("DML: Tdmdl: %fus - time for fabric to become ready and fetch dmd \n", v->Tdmdl[k]);
|
|
+ dml_print("DML: dst_x_after_scl: %f pixels - number of pixel clocks pipeline and buffer delay after scaler \n", v->DSTXAfterScaler[k]);
|
|
+ dml_print("DML: dst_y_after_scl: %d lines - number of lines of pipeline and buffer delay after scaler \n", (int)v->DSTYAfterScaler[k]);
|
|
|
|
*PrefetchBandwidth = 0;
|
|
*DestinationLinesToRequestVMInVBlank = 0;
|
|
@@ -1058,26 +1003,26 @@ static bool CalculatePrefetchSchedule(
|
|
double PrefetchBandwidth3 = 0;
|
|
double PrefetchBandwidth4 = 0;
|
|
|
|
- if (Tpre_rounded - *Tno_bw > 0)
|
|
+ if (Tpre_rounded - v->Tno_bw[k] > 0)
|
|
PrefetchBandwidth1 = (PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor + 2 * MetaRowByte
|
|
+ 2 * PixelPTEBytesPerRow * HostVMInefficiencyFactor
|
|
+ PrefetchSourceLinesY * swath_width_luma_ub * BytePerPixelY
|
|
- + PrefetchSourceLinesC * swath_width_chroma_ub * BytePerPixelC)
|
|
- / (Tpre_rounded - *Tno_bw);
|
|
+ + PrefetchSourceLinesC * swath_width_chroma_ub * v->BytePerPixelC[k])
|
|
+ / (Tpre_rounded - v->Tno_bw[k]);
|
|
else
|
|
PrefetchBandwidth1 = 0;
|
|
|
|
- if (VStartup == MaxVStartup && (PrefetchBandwidth1 > 4 * prefetch_bw_oto) && (Tpre_rounded - Tsw_oto / 4 - 0.75 * LineTime - *Tno_bw) > 0) {
|
|
- PrefetchBandwidth1 = (PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor + 2 * MetaRowByte + 2 * PixelPTEBytesPerRow * HostVMInefficiencyFactor) / (Tpre_rounded - Tsw_oto / 4 - 0.75 * LineTime - *Tno_bw);
|
|
+ if (VStartup == MaxVStartup && (PrefetchBandwidth1 > 4 * prefetch_bw_oto) && (Tpre_rounded - Tsw_oto / 4 - 0.75 * LineTime - v->Tno_bw[k]) > 0) {
|
|
+ PrefetchBandwidth1 = (PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor + 2 * MetaRowByte + 2 * PixelPTEBytesPerRow * HostVMInefficiencyFactor) / (Tpre_rounded - Tsw_oto / 4 - 0.75 * LineTime - v->Tno_bw[k]);
|
|
}
|
|
|
|
- if (Tpre_rounded - *Tno_bw - 2 * Tr0_trips_rounded > 0)
|
|
+ if (Tpre_rounded - v->Tno_bw[k] - 2 * Tr0_trips_rounded > 0)
|
|
PrefetchBandwidth2 = (PDEAndMetaPTEBytesFrame *
|
|
HostVMInefficiencyFactor + PrefetchSourceLinesY *
|
|
swath_width_luma_ub * BytePerPixelY +
|
|
PrefetchSourceLinesC * swath_width_chroma_ub *
|
|
- BytePerPixelC) /
|
|
- (Tpre_rounded - *Tno_bw - 2 * Tr0_trips_rounded);
|
|
+ v->BytePerPixelC[k]) /
|
|
+ (Tpre_rounded - v->Tno_bw[k] - 2 * Tr0_trips_rounded);
|
|
else
|
|
PrefetchBandwidth2 = 0;
|
|
|
|
@@ -1085,7 +1030,7 @@ static bool CalculatePrefetchSchedule(
|
|
PrefetchBandwidth3 = (2 * MetaRowByte + 2 * PixelPTEBytesPerRow *
|
|
HostVMInefficiencyFactor + PrefetchSourceLinesY *
|
|
swath_width_luma_ub * BytePerPixelY + PrefetchSourceLinesC *
|
|
- swath_width_chroma_ub * BytePerPixelC) / (Tpre_rounded -
|
|
+ swath_width_chroma_ub * v->BytePerPixelC[k]) / (Tpre_rounded -
|
|
Tvm_trips_rounded);
|
|
else
|
|
PrefetchBandwidth3 = 0;
|
|
@@ -1095,7 +1040,7 @@ static bool CalculatePrefetchSchedule(
|
|
}
|
|
|
|
if (Tpre_rounded - Tvm_trips_rounded - 2 * Tr0_trips_rounded > 0)
|
|
- PrefetchBandwidth4 = (PrefetchSourceLinesY * swath_width_luma_ub * BytePerPixelY + PrefetchSourceLinesC * swath_width_chroma_ub * BytePerPixelC)
|
|
+ PrefetchBandwidth4 = (PrefetchSourceLinesY * swath_width_luma_ub * BytePerPixelY + PrefetchSourceLinesC * swath_width_chroma_ub * v->BytePerPixelC[k])
|
|
/ (Tpre_rounded - Tvm_trips_rounded - 2 * Tr0_trips_rounded);
|
|
else
|
|
PrefetchBandwidth4 = 0;
|
|
@@ -1106,7 +1051,7 @@ static bool CalculatePrefetchSchedule(
|
|
bool Case3OK;
|
|
|
|
if (PrefetchBandwidth1 > 0) {
|
|
- if (*Tno_bw + PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor / PrefetchBandwidth1
|
|
+ if (v->Tno_bw[k] + PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor / PrefetchBandwidth1
|
|
>= Tvm_trips_rounded && (MetaRowByte + PixelPTEBytesPerRow * HostVMInefficiencyFactor) / PrefetchBandwidth1 >= Tr0_trips_rounded) {
|
|
Case1OK = true;
|
|
} else {
|
|
@@ -1117,7 +1062,7 @@ static bool CalculatePrefetchSchedule(
|
|
}
|
|
|
|
if (PrefetchBandwidth2 > 0) {
|
|
- if (*Tno_bw + PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor / PrefetchBandwidth2
|
|
+ if (v->Tno_bw[k] + PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor / PrefetchBandwidth2
|
|
>= Tvm_trips_rounded && (MetaRowByte + PixelPTEBytesPerRow * HostVMInefficiencyFactor) / PrefetchBandwidth2 < Tr0_trips_rounded) {
|
|
Case2OK = true;
|
|
} else {
|
|
@@ -1128,7 +1073,7 @@ static bool CalculatePrefetchSchedule(
|
|
}
|
|
|
|
if (PrefetchBandwidth3 > 0) {
|
|
- if (*Tno_bw + PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor / PrefetchBandwidth3
|
|
+ if (v->Tno_bw[k] + PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor / PrefetchBandwidth3
|
|
< Tvm_trips_rounded && (MetaRowByte + PixelPTEBytesPerRow * HostVMInefficiencyFactor) / PrefetchBandwidth3 >= Tr0_trips_rounded) {
|
|
Case3OK = true;
|
|
} else {
|
|
@@ -1151,13 +1096,13 @@ static bool CalculatePrefetchSchedule(
|
|
dml_print("DML: prefetch_bw_equ: %f\n", prefetch_bw_equ);
|
|
|
|
if (prefetch_bw_equ > 0) {
|
|
- if (GPUVMEnable) {
|
|
- Tvm_equ = dml_max3(*Tno_bw + PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor / prefetch_bw_equ, Tvm_trips, LineTime / 4);
|
|
+ if (v->GPUVMEnable) {
|
|
+ Tvm_equ = dml_max3(v->Tno_bw[k] + PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor / prefetch_bw_equ, Tvm_trips, LineTime / 4);
|
|
} else {
|
|
Tvm_equ = LineTime / 4;
|
|
}
|
|
|
|
- if ((GPUVMEnable || myPipe->DCCEnable)) {
|
|
+ if ((v->GPUVMEnable || myPipe->DCCEnable)) {
|
|
Tr0_equ = dml_max4(
|
|
(MetaRowByte + PixelPTEBytesPerRow * HostVMInefficiencyFactor) / prefetch_bw_equ,
|
|
Tr0_trips,
|
|
@@ -1226,7 +1171,7 @@ static bool CalculatePrefetchSchedule(
|
|
}
|
|
|
|
*RequiredPrefetchPixDataBWLuma = (double) PrefetchSourceLinesY / LinesToRequestPrefetchPixelData * BytePerPixelY * swath_width_luma_ub / LineTime;
|
|
- *RequiredPrefetchPixDataBWChroma = (double) PrefetchSourceLinesC / LinesToRequestPrefetchPixelData * BytePerPixelC * swath_width_chroma_ub / LineTime;
|
|
+ *RequiredPrefetchPixDataBWChroma = (double) PrefetchSourceLinesC / LinesToRequestPrefetchPixelData * v->BytePerPixelC[k] * swath_width_chroma_ub / LineTime;
|
|
} else {
|
|
MyError = true;
|
|
dml_print("DML: MyErr set %s:%d\n", __FILE__, __LINE__);
|
|
@@ -1242,9 +1187,9 @@ static bool CalculatePrefetchSchedule(
|
|
dml_print("DML: Tr0: %fus - time to fetch first row of data pagetables and first row of meta data (done in parallel)\n", TimeForFetchingRowInVBlank);
|
|
dml_print("DML: Tr1: %fus - time to fetch second row of data pagetables and second row of meta data (done in parallel)\n", TimeForFetchingRowInVBlank);
|
|
dml_print("DML: Tsw: %fus = time to fetch enough pixel data and cursor data to feed the scalers init position and detile\n", (double)LinesToRequestPrefetchPixelData * LineTime);
|
|
- dml_print("DML: To: %fus - time for propagation from scaler to optc\n", (*DSTYAfterScaler + ((*DSTXAfterScaler) / (double) myPipe->HTotal)) * LineTime);
|
|
+ dml_print("DML: To: %fus - time for propagation from scaler to optc\n", (v->DSTYAfterScaler[k] + ((v->DSTXAfterScaler[k]) / (double) myPipe->HTotal)) * LineTime);
|
|
dml_print("DML: Tvstartup - Tsetup - Tcalc - Twait - Tpre - To > 0\n");
|
|
- dml_print("DML: Tslack(pre): %fus - time left over in schedule\n", VStartup * LineTime - TimeForFetchingMetaPTE - 2 * TimeForFetchingRowInVBlank - (*DSTYAfterScaler + ((*DSTXAfterScaler) / (double) myPipe->HTotal)) * LineTime - TWait - TCalc - Tsetup);
|
|
+ dml_print("DML: Tslack(pre): %fus - time left over in schedule\n", VStartup * LineTime - TimeForFetchingMetaPTE - 2 * TimeForFetchingRowInVBlank - (v->DSTYAfterScaler[k] + ((v->DSTXAfterScaler[k]) / (double) myPipe->HTotal)) * LineTime - TWait - TCalc - Tsetup);
|
|
dml_print("DML: row_bytes = dpte_row_bytes (per_pipe) = PixelPTEBytesPerRow = : %d\n", PixelPTEBytesPerRow);
|
|
|
|
} else {
|
|
@@ -1275,7 +1220,7 @@ static bool CalculatePrefetchSchedule(
|
|
dml_print("DML: MyErr set %s:%d\n", __FILE__, __LINE__);
|
|
}
|
|
|
|
- *prefetch_vmrow_bw = dml_max(prefetch_vm_bw, prefetch_row_bw);
|
|
+ v->prefetch_vmrow_bw[k] = dml_max(prefetch_vm_bw, prefetch_row_bw);
|
|
}
|
|
|
|
if (MyError) {
|
|
@@ -2448,30 +2393,12 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
|
|
|
|
v->ErrorResult[k] = CalculatePrefetchSchedule(
|
|
mode_lib,
|
|
- v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
|
|
- v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
|
|
+ k,
|
|
&myPipe,
|
|
v->DSCDelay[k],
|
|
- v->DPPCLKDelaySubtotal
|
|
- + v->DPPCLKDelayCNVCFormater,
|
|
- v->DPPCLKDelaySCL,
|
|
- v->DPPCLKDelaySCLLBOnly,
|
|
- v->DPPCLKDelayCNVCCursor,
|
|
- v->DISPCLKDelaySubtotal,
|
|
(unsigned int) (v->SwathWidthY[k] / v->HRatio[k]),
|
|
- v->OutputFormat[k],
|
|
- v->MaxInterDCNTileRepeaters,
|
|
dml_min(v->VStartupLines, v->MaxVStartupLines[k]),
|
|
v->MaxVStartupLines[k],
|
|
- v->GPUVMMaxPageTableLevels,
|
|
- v->GPUVMEnable,
|
|
- v->HostVMEnable,
|
|
- v->HostVMMaxNonCachedPageTableLevels,
|
|
- v->HostVMMinPageSize,
|
|
- v->DynamicMetadataEnable[k],
|
|
- v->DynamicMetadataVMEnabled,
|
|
- v->DynamicMetadataLinesBeforeActiveRequired[k],
|
|
- v->DynamicMetadataTransmittedBytes[k],
|
|
v->UrgentLatency,
|
|
v->UrgentExtraLatency,
|
|
v->TCalc,
|
|
@@ -2485,7 +2412,6 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
|
|
v->MaxNumSwathY[k],
|
|
v->PrefetchSourceLinesC[k],
|
|
v->SwathWidthC[k],
|
|
- v->BytePerPixelC[k],
|
|
v->VInitPreFillC[k],
|
|
v->MaxNumSwathC[k],
|
|
v->swath_width_luma_ub[k],
|
|
@@ -2493,9 +2419,6 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
|
|
v->SwathHeightY[k],
|
|
v->SwathHeightC[k],
|
|
TWait,
|
|
- v->ProgressiveToInterlaceUnitInOPP,
|
|
- &v->DSTXAfterScaler[k],
|
|
- &v->DSTYAfterScaler[k],
|
|
&v->DestinationLinesForPrefetch[k],
|
|
&v->PrefetchBandwidth[k],
|
|
&v->DestinationLinesToRequestVMInVBlank[k],
|
|
@@ -2504,14 +2427,7 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
|
|
&v->VRatioPrefetchC[k],
|
|
&v->RequiredPrefetchPixDataBWLuma[k],
|
|
&v->RequiredPrefetchPixDataBWChroma[k],
|
|
- &v->NotEnoughTimeForDynamicMetadata[k],
|
|
- &v->Tno_bw[k],
|
|
- &v->prefetch_vmrow_bw[k],
|
|
- &v->Tdmdl_vm[k],
|
|
- &v->Tdmdl[k],
|
|
- &v->VUpdateOffsetPix[k],
|
|
- &v->VUpdateWidthPix[k],
|
|
- &v->VReadyOffsetPix[k]);
|
|
+ &v->NotEnoughTimeForDynamicMetadata[k]);
|
|
if (v->BlendingAndTiming[k] == k) {
|
|
double TotalRepeaterDelayTime = v->MaxInterDCNTileRepeaters * (2 / v->DPPCLK[k] + 3 / v->DISPCLK);
|
|
v->VUpdateWidthPix[k] = (14 / v->DCFCLKDeepSleep + 12 / v->DPPCLK[k] + TotalRepeaterDelayTime) * v->PixelClock[k];
|
|
@@ -4781,29 +4697,12 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
|
|
|
|
v->NoTimeForPrefetch[i][j][k] = CalculatePrefetchSchedule(
|
|
mode_lib,
|
|
- v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
|
|
- v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
|
|
+ k,
|
|
&myPipe,
|
|
v->DSCDelayPerState[i][k],
|
|
- v->DPPCLKDelaySubtotal + v->DPPCLKDelayCNVCFormater,
|
|
- v->DPPCLKDelaySCL,
|
|
- v->DPPCLKDelaySCLLBOnly,
|
|
- v->DPPCLKDelayCNVCCursor,
|
|
- v->DISPCLKDelaySubtotal,
|
|
v->SwathWidthYThisState[k] / v->HRatio[k],
|
|
- v->OutputFormat[k],
|
|
- v->MaxInterDCNTileRepeaters,
|
|
dml_min(v->MaxVStartup, v->MaximumVStartup[i][j][k]),
|
|
v->MaximumVStartup[i][j][k],
|
|
- v->GPUVMMaxPageTableLevels,
|
|
- v->GPUVMEnable,
|
|
- v->HostVMEnable,
|
|
- v->HostVMMaxNonCachedPageTableLevels,
|
|
- v->HostVMMinPageSize,
|
|
- v->DynamicMetadataEnable[k],
|
|
- v->DynamicMetadataVMEnabled,
|
|
- v->DynamicMetadataLinesBeforeActiveRequired[k],
|
|
- v->DynamicMetadataTransmittedBytes[k],
|
|
v->UrgLatency[i],
|
|
v->ExtraLatency,
|
|
v->TimeCalc,
|
|
@@ -4817,7 +4716,6 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
|
|
v->MaxNumSwY[k],
|
|
v->PrefetchLinesC[i][j][k],
|
|
v->SwathWidthCThisState[k],
|
|
- v->BytePerPixelC[k],
|
|
v->PrefillC[k],
|
|
v->MaxNumSwC[k],
|
|
v->swath_width_luma_ub_this_state[k],
|
|
@@ -4825,9 +4723,6 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
|
|
v->SwathHeightYThisState[k],
|
|
v->SwathHeightCThisState[k],
|
|
v->TWait,
|
|
- v->ProgressiveToInterlaceUnitInOPP,
|
|
- &v->DSTXAfterScaler[k],
|
|
- &v->DSTYAfterScaler[k],
|
|
&v->LineTimesForPrefetch[k],
|
|
&v->PrefetchBW[k],
|
|
&v->LinesForMetaPTE[k],
|
|
@@ -4836,14 +4731,7 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
|
|
&v->VRatioPreC[i][j][k],
|
|
&v->RequiredPrefetchPixelDataBWLuma[i][j][k],
|
|
&v->RequiredPrefetchPixelDataBWChroma[i][j][k],
|
|
- &v->NoTimeForDynamicMetadata[i][j][k],
|
|
- &v->Tno_bw[k],
|
|
- &v->prefetch_vmrow_bw[k],
|
|
- &v->Tdmdl_vm[k],
|
|
- &v->Tdmdl[k],
|
|
- &v->VUpdateOffsetPix[k],
|
|
- &v->VUpdateWidthPix[k],
|
|
- &v->VReadyOffsetPix[k]);
|
|
+ &v->NoTimeForDynamicMetadata[i][j][k]);
|
|
}
|
|
|
|
for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
|
|
--
|
|
cgit 1.2.3-korg
|
|
`},
|
|
|
|
{"6ce6fbfddc5b127e4f57c3b5bfdcf40239a4fc2f", `From 6ce6fbfddc5b127e4f57c3b5bfdcf40239a4fc2f Mon Sep 17 00:00:00 2001
|
|
From: Nathan Chancellor <nathan@kernel.org>
|
|
Date: Sat, 13 Dec 2025 19:58:11 +0900
|
|
Subject: drm/amd/display: Reduce number of arguments of dcn30's
|
|
CalculateWatermarksAndDRAMSpeedChangeSupport()
|
|
|
|
CalculateWatermarksAndDRAMSpeedChangeSupport() has a large number of
|
|
parameters, which must be passed on the stack. Most of the parameters
|
|
between the two callsites are the same, so they can be accessed through
|
|
the existing mode_lib pointer, instead of being passed as explicit
|
|
arguments. Doing this reduces the stack size of
|
|
dml30_ModeSupportAndSystemConfigurationFull() from 1912 bytes to 1840
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bytes building for x86_64 with clang-22, helping stay under the 2048
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byte limit for display_mode_vba_30.c.
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Additionally, now that there is a pointer to mode_lib->vba available,
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use 'v' consistently throughout the entire function.
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Signed-off-by: Nathan Chancellor <nathan@kernel.org>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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(cherry picked from commit 563dfbefdf633c8d958398ddfa3955f9f40e47d9)
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---
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.../amd/display/dc/dml/dcn30/display_mode_vba_30.c | 287 +++++----------------
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1 file changed, 66 insertions(+), 221 deletions(-)
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diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
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index 2d19bb8de59c84..1df3412be3465d 100644
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--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
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+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
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@@ -265,62 +265,23 @@ static void CalculateDynamicMetadataParameters(
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static void CalculateWatermarksAndDRAMSpeedChangeSupport(
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struct display_mode_lib *mode_lib,
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unsigned int PrefetchMode,
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- unsigned int NumberOfActivePlanes,
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- unsigned int MaxLineBufferLines,
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- unsigned int LineBufferSize,
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- unsigned int DPPOutputBufferPixels,
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- unsigned int DETBufferSizeInKByte,
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- unsigned int WritebackInterfaceBufferSize,
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double DCFCLK,
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double ReturnBW,
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- bool GPUVMEnable,
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- unsigned int dpte_group_bytes[],
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- unsigned int MetaChunkSize,
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double UrgentLatency,
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double ExtraLatency,
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- double WritebackLatency,
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- double WritebackChunkSize,
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double SOCCLK,
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- double DRAMClockChangeLatency,
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- double SRExitTime,
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- double SREnterPlusExitTime,
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double DCFCLKDeepSleep,
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unsigned int DPPPerPlane[],
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- bool DCCEnable[],
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double DPPCLK[],
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unsigned int DETBufferSizeY[],
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unsigned int DETBufferSizeC[],
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unsigned int SwathHeightY[],
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unsigned int SwathHeightC[],
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- unsigned int LBBitPerPixel[],
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double SwathWidthY[],
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double SwathWidthC[],
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- double HRatio[],
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- double HRatioChroma[],
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- unsigned int vtaps[],
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- unsigned int VTAPsChroma[],
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- double VRatio[],
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- double VRatioChroma[],
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- unsigned int HTotal[],
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- double PixelClock[],
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- unsigned int BlendingAndTiming[],
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double BytePerPixelDETY[],
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double BytePerPixelDETC[],
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- double DSTXAfterScaler[],
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- double DSTYAfterScaler[],
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- bool WritebackEnable[],
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- enum source_format_class WritebackPixelFormat[],
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- double WritebackDestinationWidth[],
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- double WritebackDestinationHeight[],
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- double WritebackSourceHeight[],
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- enum clock_change_support *DRAMClockChangeSupport,
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- double *UrgentWatermark,
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- double *WritebackUrgentWatermark,
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- double *DRAMClockChangeWatermark,
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- double *WritebackDRAMClockChangeWatermark,
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- double *StutterExitWatermark,
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- double *StutterEnterPlusExitWatermark,
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- double *MinActiveDRAMClockChangeLatencySupported);
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+ enum clock_change_support *DRAMClockChangeSupport);
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static void CalculateDCFCLKDeepSleep(
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struct display_mode_lib *mode_lib,
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unsigned int NumberOfActivePlanes,
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@@ -2646,62 +2607,23 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
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CalculateWatermarksAndDRAMSpeedChangeSupport(
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mode_lib,
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PrefetchMode,
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- v->NumberOfActivePlanes,
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- v->MaxLineBufferLines,
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- v->LineBufferSize,
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- v->DPPOutputBufferPixels,
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- v->DETBufferSizeInKByte[0],
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- v->WritebackInterfaceBufferSize,
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v->DCFCLK,
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v->ReturnBW,
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- v->GPUVMEnable,
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- v->dpte_group_bytes,
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- v->MetaChunkSize,
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v->UrgentLatency,
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v->UrgentExtraLatency,
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- v->WritebackLatency,
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- v->WritebackChunkSize,
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v->SOCCLK,
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- v->FinalDRAMClockChangeLatency,
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- v->SRExitTime,
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- v->SREnterPlusExitTime,
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v->DCFCLKDeepSleep,
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v->DPPPerPlane,
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- v->DCCEnable,
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v->DPPCLK,
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v->DETBufferSizeY,
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v->DETBufferSizeC,
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v->SwathHeightY,
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v->SwathHeightC,
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- v->LBBitPerPixel,
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v->SwathWidthY,
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v->SwathWidthC,
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- v->HRatio,
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- v->HRatioChroma,
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- v->vtaps,
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- v->VTAPsChroma,
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- v->VRatio,
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- v->VRatioChroma,
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- v->HTotal,
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- v->PixelClock,
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- v->BlendingAndTiming,
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v->BytePerPixelDETY,
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v->BytePerPixelDETC,
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- v->DSTXAfterScaler,
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- v->DSTYAfterScaler,
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- v->WritebackEnable,
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- v->WritebackPixelFormat,
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- v->WritebackDestinationWidth,
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- v->WritebackDestinationHeight,
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- v->WritebackSourceHeight,
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- &DRAMClockChangeSupport,
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- &v->UrgentWatermark,
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- &v->WritebackUrgentWatermark,
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- &v->DRAMClockChangeWatermark,
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- &v->WritebackDRAMClockChangeWatermark,
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- &v->StutterExitWatermark,
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- &v->StutterEnterPlusExitWatermark,
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- &v->MinActiveDRAMClockChangeLatencySupported);
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+ &DRAMClockChangeSupport);
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for (k = 0; k < v->NumberOfActivePlanes; ++k) {
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if (v->WritebackEnable[k] == true) {
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@@ -4895,62 +4817,23 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
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CalculateWatermarksAndDRAMSpeedChangeSupport(
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mode_lib,
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v->PrefetchModePerState[i][j],
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- v->NumberOfActivePlanes,
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- v->MaxLineBufferLines,
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- v->LineBufferSize,
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- v->DPPOutputBufferPixels,
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- v->DETBufferSizeInKByte[0],
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- v->WritebackInterfaceBufferSize,
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v->DCFCLKState[i][j],
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v->ReturnBWPerState[i][j],
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- v->GPUVMEnable,
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- v->dpte_group_bytes,
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- v->MetaChunkSize,
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v->UrgLatency[i],
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v->ExtraLatency,
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- v->WritebackLatency,
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- v->WritebackChunkSize,
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v->SOCCLKPerState[i],
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- v->FinalDRAMClockChangeLatency,
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- v->SRExitTime,
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- v->SREnterPlusExitTime,
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v->ProjectedDCFCLKDeepSleep[i][j],
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v->NoOfDPPThisState,
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- v->DCCEnable,
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v->RequiredDPPCLKThisState,
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v->DETBufferSizeYThisState,
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v->DETBufferSizeCThisState,
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v->SwathHeightYThisState,
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v->SwathHeightCThisState,
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- v->LBBitPerPixel,
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v->SwathWidthYThisState,
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v->SwathWidthCThisState,
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- v->HRatio,
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- v->HRatioChroma,
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- v->vtaps,
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- v->VTAPsChroma,
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- v->VRatio,
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- v->VRatioChroma,
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- v->HTotal,
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- v->PixelClock,
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- v->BlendingAndTiming,
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v->BytePerPixelInDETY,
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v->BytePerPixelInDETC,
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- v->DSTXAfterScaler,
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- v->DSTYAfterScaler,
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- v->WritebackEnable,
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- v->WritebackPixelFormat,
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- v->WritebackDestinationWidth,
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- v->WritebackDestinationHeight,
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- v->WritebackSourceHeight,
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- &v->DRAMClockChangeSupport[i][j],
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- &v->UrgentWatermark,
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- &v->WritebackUrgentWatermark,
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- &v->DRAMClockChangeWatermark,
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- &v->WritebackDRAMClockChangeWatermark,
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- &v->StutterExitWatermark,
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- &v->StutterEnterPlusExitWatermark,
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- &v->MinActiveDRAMClockChangeLatencySupported);
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+ &v->DRAMClockChangeSupport[i][j]);
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}
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}
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@@ -5067,63 +4950,25 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
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static void CalculateWatermarksAndDRAMSpeedChangeSupport(
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struct display_mode_lib *mode_lib,
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unsigned int PrefetchMode,
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- unsigned int NumberOfActivePlanes,
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- unsigned int MaxLineBufferLines,
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- unsigned int LineBufferSize,
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- unsigned int DPPOutputBufferPixels,
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- unsigned int DETBufferSizeInKByte,
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- unsigned int WritebackInterfaceBufferSize,
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double DCFCLK,
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double ReturnBW,
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- bool GPUVMEnable,
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- unsigned int dpte_group_bytes[],
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- unsigned int MetaChunkSize,
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double UrgentLatency,
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double ExtraLatency,
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- double WritebackLatency,
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- double WritebackChunkSize,
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double SOCCLK,
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- double DRAMClockChangeLatency,
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- double SRExitTime,
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- double SREnterPlusExitTime,
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double DCFCLKDeepSleep,
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unsigned int DPPPerPlane[],
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- bool DCCEnable[],
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double DPPCLK[],
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unsigned int DETBufferSizeY[],
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unsigned int DETBufferSizeC[],
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unsigned int SwathHeightY[],
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unsigned int SwathHeightC[],
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- unsigned int LBBitPerPixel[],
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double SwathWidthY[],
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double SwathWidthC[],
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- double HRatio[],
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- double HRatioChroma[],
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- unsigned int vtaps[],
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- unsigned int VTAPsChroma[],
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- double VRatio[],
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- double VRatioChroma[],
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- unsigned int HTotal[],
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- double PixelClock[],
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- unsigned int BlendingAndTiming[],
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double BytePerPixelDETY[],
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double BytePerPixelDETC[],
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- double DSTXAfterScaler[],
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- double DSTYAfterScaler[],
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- bool WritebackEnable[],
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- enum source_format_class WritebackPixelFormat[],
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- double WritebackDestinationWidth[],
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- double WritebackDestinationHeight[],
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- double WritebackSourceHeight[],
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- enum clock_change_support *DRAMClockChangeSupport,
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- double *UrgentWatermark,
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- double *WritebackUrgentWatermark,
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- double *DRAMClockChangeWatermark,
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- double *WritebackDRAMClockChangeWatermark,
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- double *StutterExitWatermark,
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- double *StutterEnterPlusExitWatermark,
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- double *MinActiveDRAMClockChangeLatencySupported)
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+ enum clock_change_support *DRAMClockChangeSupport)
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{
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+ struct vba_vars_st *v = &mode_lib->vba;
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double EffectiveLBLatencyHidingY = 0;
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double EffectiveLBLatencyHidingC = 0;
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double LinesInDETY[DC__NUM_DPP__MAX] = { 0 };
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@@ -5142,101 +4987,101 @@ static void CalculateWatermarksAndDRAMSpeedChangeSupport(
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double WritebackDRAMClockChangeLatencyHiding = 0;
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unsigned int k, j;
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- mode_lib->vba.TotalActiveDPP = 0;
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- mode_lib->vba.TotalDCCActiveDPP = 0;
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- for (k = 0; k < NumberOfActivePlanes; ++k) {
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- mode_lib->vba.TotalActiveDPP = mode_lib->vba.TotalActiveDPP + DPPPerPlane[k];
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- if (DCCEnable[k] == true) {
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- mode_lib->vba.TotalDCCActiveDPP = mode_lib->vba.TotalDCCActiveDPP + DPPPerPlane[k];
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+ v->TotalActiveDPP = 0;
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+ v->TotalDCCActiveDPP = 0;
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+ for (k = 0; k < v->NumberOfActivePlanes; ++k) {
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+ v->TotalActiveDPP = v->TotalActiveDPP + DPPPerPlane[k];
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+ if (v->DCCEnable[k] == true) {
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+ v->TotalDCCActiveDPP = v->TotalDCCActiveDPP + DPPPerPlane[k];
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}
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}
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- *UrgentWatermark = UrgentLatency + ExtraLatency;
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+ v->UrgentWatermark = UrgentLatency + ExtraLatency;
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- *DRAMClockChangeWatermark = DRAMClockChangeLatency + *UrgentWatermark;
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+ v->DRAMClockChangeWatermark = v->FinalDRAMClockChangeLatency + v->UrgentWatermark;
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- mode_lib->vba.TotalActiveWriteback = 0;
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- for (k = 0; k < NumberOfActivePlanes; ++k) {
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- if (WritebackEnable[k] == true) {
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- mode_lib->vba.TotalActiveWriteback = mode_lib->vba.TotalActiveWriteback + 1;
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+ v->TotalActiveWriteback = 0;
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+ for (k = 0; k < v->NumberOfActivePlanes; ++k) {
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+ if (v->WritebackEnable[k] == true) {
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+ v->TotalActiveWriteback = v->TotalActiveWriteback + 1;
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}
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}
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- if (mode_lib->vba.TotalActiveWriteback <= 1) {
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- *WritebackUrgentWatermark = WritebackLatency;
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+ if (v->TotalActiveWriteback <= 1) {
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+ v->WritebackUrgentWatermark = v->WritebackLatency;
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} else {
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- *WritebackUrgentWatermark = WritebackLatency + WritebackChunkSize * 1024.0 / 32.0 / SOCCLK;
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+ v->WritebackUrgentWatermark = v->WritebackLatency + v->WritebackChunkSize * 1024.0 / 32.0 / SOCCLK;
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}
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- if (mode_lib->vba.TotalActiveWriteback <= 1) {
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- *WritebackDRAMClockChangeWatermark = DRAMClockChangeLatency + WritebackLatency;
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+ if (v->TotalActiveWriteback <= 1) {
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+ v->WritebackDRAMClockChangeWatermark = v->FinalDRAMClockChangeLatency + v->WritebackLatency;
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} else {
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- *WritebackDRAMClockChangeWatermark = DRAMClockChangeLatency + WritebackLatency + WritebackChunkSize * 1024.0 / 32.0 / SOCCLK;
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+ v->WritebackDRAMClockChangeWatermark = v->FinalDRAMClockChangeLatency + v->WritebackLatency + v->WritebackChunkSize * 1024.0 / 32.0 / SOCCLK;
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}
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- for (k = 0; k < NumberOfActivePlanes; ++k) {
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+ for (k = 0; k < v->NumberOfActivePlanes; ++k) {
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- mode_lib->vba.LBLatencyHidingSourceLinesY = dml_min((double) MaxLineBufferLines, dml_floor(LineBufferSize / LBBitPerPixel[k] / (SwathWidthY[k] / dml_max(HRatio[k], 1.0)), 1)) - (vtaps[k] - 1);
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+ v->LBLatencyHidingSourceLinesY = dml_min((double) v->MaxLineBufferLines, dml_floor(v->LineBufferSize / v->LBBitPerPixel[k] / (SwathWidthY[k] / dml_max(v->HRatio[k], 1.0)), 1)) - (v->vtaps[k] - 1);
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- mode_lib->vba.LBLatencyHidingSourceLinesC = dml_min((double) MaxLineBufferLines, dml_floor(LineBufferSize / LBBitPerPixel[k] / (SwathWidthC[k] / dml_max(HRatioChroma[k], 1.0)), 1)) - (VTAPsChroma[k] - 1);
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+ v->LBLatencyHidingSourceLinesC = dml_min((double) v->MaxLineBufferLines, dml_floor(v->LineBufferSize / v->LBBitPerPixel[k] / (SwathWidthC[k] / dml_max(v->HRatioChroma[k], 1.0)), 1)) - (v->VTAPsChroma[k] - 1);
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- EffectiveLBLatencyHidingY = mode_lib->vba.LBLatencyHidingSourceLinesY / VRatio[k] * (HTotal[k] / PixelClock[k]);
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+ EffectiveLBLatencyHidingY = v->LBLatencyHidingSourceLinesY / v->VRatio[k] * (v->HTotal[k] / v->PixelClock[k]);
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- EffectiveLBLatencyHidingC = mode_lib->vba.LBLatencyHidingSourceLinesC / VRatioChroma[k] * (HTotal[k] / PixelClock[k]);
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+ EffectiveLBLatencyHidingC = v->LBLatencyHidingSourceLinesC / v->VRatioChroma[k] * (v->HTotal[k] / v->PixelClock[k]);
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LinesInDETY[k] = (double) DETBufferSizeY[k] / BytePerPixelDETY[k] / SwathWidthY[k];
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LinesInDETYRoundedDownToSwath[k] = dml_floor(LinesInDETY[k], SwathHeightY[k]);
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- FullDETBufferingTimeY[k] = LinesInDETYRoundedDownToSwath[k] * (HTotal[k] / PixelClock[k]) / VRatio[k];
|
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+ FullDETBufferingTimeY[k] = LinesInDETYRoundedDownToSwath[k] * (v->HTotal[k] / v->PixelClock[k]) / v->VRatio[k];
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if (BytePerPixelDETC[k] > 0) {
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- LinesInDETC = mode_lib->vba.DETBufferSizeC[k] / BytePerPixelDETC[k] / SwathWidthC[k];
|
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+ LinesInDETC = v->DETBufferSizeC[k] / BytePerPixelDETC[k] / SwathWidthC[k];
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LinesInDETCRoundedDownToSwath = dml_floor(LinesInDETC, SwathHeightC[k]);
|
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- FullDETBufferingTimeC = LinesInDETCRoundedDownToSwath * (HTotal[k] / PixelClock[k]) / VRatioChroma[k];
|
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+ FullDETBufferingTimeC = LinesInDETCRoundedDownToSwath * (v->HTotal[k] / v->PixelClock[k]) / v->VRatioChroma[k];
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} else {
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LinesInDETC = 0;
|
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FullDETBufferingTimeC = 999999;
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}
|
|
|
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- ActiveDRAMClockChangeLatencyMarginY = EffectiveLBLatencyHidingY + FullDETBufferingTimeY[k] - *UrgentWatermark - (HTotal[k] / PixelClock[k]) * (DSTXAfterScaler[k] / HTotal[k] + DSTYAfterScaler[k]) - *DRAMClockChangeWatermark;
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+ ActiveDRAMClockChangeLatencyMarginY = EffectiveLBLatencyHidingY + FullDETBufferingTimeY[k] - v->UrgentWatermark - (v->HTotal[k] / v->PixelClock[k]) * (v->DSTXAfterScaler[k] / v->HTotal[k] + v->DSTYAfterScaler[k]) - v->DRAMClockChangeWatermark;
|
|
|
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- if (NumberOfActivePlanes > 1) {
|
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- ActiveDRAMClockChangeLatencyMarginY = ActiveDRAMClockChangeLatencyMarginY - (1 - 1.0 / NumberOfActivePlanes) * SwathHeightY[k] * HTotal[k] / PixelClock[k] / VRatio[k];
|
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+ if (v->NumberOfActivePlanes > 1) {
|
|
+ ActiveDRAMClockChangeLatencyMarginY = ActiveDRAMClockChangeLatencyMarginY - (1 - 1.0 / v->NumberOfActivePlanes) * SwathHeightY[k] * v->HTotal[k] / v->PixelClock[k] / v->VRatio[k];
|
|
}
|
|
|
|
if (BytePerPixelDETC[k] > 0) {
|
|
- ActiveDRAMClockChangeLatencyMarginC = EffectiveLBLatencyHidingC + FullDETBufferingTimeC - *UrgentWatermark - (HTotal[k] / PixelClock[k]) * (DSTXAfterScaler[k] / HTotal[k] + DSTYAfterScaler[k]) - *DRAMClockChangeWatermark;
|
|
+ ActiveDRAMClockChangeLatencyMarginC = EffectiveLBLatencyHidingC + FullDETBufferingTimeC - v->UrgentWatermark - (v->HTotal[k] / v->PixelClock[k]) * (v->DSTXAfterScaler[k] / v->HTotal[k] + v->DSTYAfterScaler[k]) - v->DRAMClockChangeWatermark;
|
|
|
|
- if (NumberOfActivePlanes > 1) {
|
|
- ActiveDRAMClockChangeLatencyMarginC = ActiveDRAMClockChangeLatencyMarginC - (1 - 1.0 / NumberOfActivePlanes) * SwathHeightC[k] * HTotal[k] / PixelClock[k] / VRatioChroma[k];
|
|
+ if (v->NumberOfActivePlanes > 1) {
|
|
+ ActiveDRAMClockChangeLatencyMarginC = ActiveDRAMClockChangeLatencyMarginC - (1 - 1.0 / v->NumberOfActivePlanes) * SwathHeightC[k] * v->HTotal[k] / v->PixelClock[k] / v->VRatioChroma[k];
|
|
}
|
|
- mode_lib->vba.ActiveDRAMClockChangeLatencyMargin[k] = dml_min(ActiveDRAMClockChangeLatencyMarginY, ActiveDRAMClockChangeLatencyMarginC);
|
|
+ v->ActiveDRAMClockChangeLatencyMargin[k] = dml_min(ActiveDRAMClockChangeLatencyMarginY, ActiveDRAMClockChangeLatencyMarginC);
|
|
} else {
|
|
- mode_lib->vba.ActiveDRAMClockChangeLatencyMargin[k] = ActiveDRAMClockChangeLatencyMarginY;
|
|
+ v->ActiveDRAMClockChangeLatencyMargin[k] = ActiveDRAMClockChangeLatencyMarginY;
|
|
}
|
|
|
|
- if (WritebackEnable[k] == true) {
|
|
+ if (v->WritebackEnable[k] == true) {
|
|
|
|
- WritebackDRAMClockChangeLatencyHiding = WritebackInterfaceBufferSize * 1024 / (WritebackDestinationWidth[k] * WritebackDestinationHeight[k] / (WritebackSourceHeight[k] * HTotal[k] / PixelClock[k]) * 4);
|
|
- if (WritebackPixelFormat[k] == dm_444_64) {
|
|
+ WritebackDRAMClockChangeLatencyHiding = v->WritebackInterfaceBufferSize * 1024 / (v->WritebackDestinationWidth[k] * v->WritebackDestinationHeight[k] / (v->WritebackSourceHeight[k] * v->HTotal[k] / v->PixelClock[k]) * 4);
|
|
+ if (v->WritebackPixelFormat[k] == dm_444_64) {
|
|
WritebackDRAMClockChangeLatencyHiding = WritebackDRAMClockChangeLatencyHiding / 2;
|
|
}
|
|
- if (mode_lib->vba.WritebackConfiguration == dm_whole_buffer_for_single_stream_interleave) {
|
|
+ if (v->WritebackConfiguration == dm_whole_buffer_for_single_stream_interleave) {
|
|
WritebackDRAMClockChangeLatencyHiding = WritebackDRAMClockChangeLatencyHiding * 2;
|
|
}
|
|
- WritebackDRAMClockChangeLatencyMargin = WritebackDRAMClockChangeLatencyHiding - mode_lib->vba.WritebackDRAMClockChangeWatermark;
|
|
- mode_lib->vba.ActiveDRAMClockChangeLatencyMargin[k] = dml_min(mode_lib->vba.ActiveDRAMClockChangeLatencyMargin[k], WritebackDRAMClockChangeLatencyMargin);
|
|
+ WritebackDRAMClockChangeLatencyMargin = WritebackDRAMClockChangeLatencyHiding - v->WritebackDRAMClockChangeWatermark;
|
|
+ v->ActiveDRAMClockChangeLatencyMargin[k] = dml_min(v->ActiveDRAMClockChangeLatencyMargin[k], WritebackDRAMClockChangeLatencyMargin);
|
|
}
|
|
}
|
|
|
|
- mode_lib->vba.MinActiveDRAMClockChangeMargin = 999999;
|
|
+ v->MinActiveDRAMClockChangeMargin = 999999;
|
|
PlaneWithMinActiveDRAMClockChangeMargin = 0;
|
|
- for (k = 0; k < NumberOfActivePlanes; ++k) {
|
|
- if (mode_lib->vba.ActiveDRAMClockChangeLatencyMargin[k] < mode_lib->vba.MinActiveDRAMClockChangeMargin) {
|
|
- mode_lib->vba.MinActiveDRAMClockChangeMargin = mode_lib->vba.ActiveDRAMClockChangeLatencyMargin[k];
|
|
- if (BlendingAndTiming[k] == k) {
|
|
+ for (k = 0; k < v->NumberOfActivePlanes; ++k) {
|
|
+ if (v->ActiveDRAMClockChangeLatencyMargin[k] < v->MinActiveDRAMClockChangeMargin) {
|
|
+ v->MinActiveDRAMClockChangeMargin = v->ActiveDRAMClockChangeLatencyMargin[k];
|
|
+ if (v->BlendingAndTiming[k] == k) {
|
|
PlaneWithMinActiveDRAMClockChangeMargin = k;
|
|
} else {
|
|
- for (j = 0; j < NumberOfActivePlanes; ++j) {
|
|
- if (BlendingAndTiming[k] == j) {
|
|
+ for (j = 0; j < v->NumberOfActivePlanes; ++j) {
|
|
+ if (v->BlendingAndTiming[k] == j) {
|
|
PlaneWithMinActiveDRAMClockChangeMargin = j;
|
|
}
|
|
}
|
|
@@ -5244,40 +5089,40 @@ static void CalculateWatermarksAndDRAMSpeedChangeSupport(
|
|
}
|
|
}
|
|
|
|
- *MinActiveDRAMClockChangeLatencySupported = mode_lib->vba.MinActiveDRAMClockChangeMargin + DRAMClockChangeLatency;
|
|
+ v->MinActiveDRAMClockChangeLatencySupported = v->MinActiveDRAMClockChangeMargin + v->FinalDRAMClockChangeLatency;
|
|
|
|
SecondMinActiveDRAMClockChangeMarginOneDisplayInVBLank = 999999;
|
|
- for (k = 0; k < NumberOfActivePlanes; ++k) {
|
|
- if (!((k == PlaneWithMinActiveDRAMClockChangeMargin) && (BlendingAndTiming[k] == k)) && !(BlendingAndTiming[k] == PlaneWithMinActiveDRAMClockChangeMargin) && mode_lib->vba.ActiveDRAMClockChangeLatencyMargin[k] < SecondMinActiveDRAMClockChangeMarginOneDisplayInVBLank) {
|
|
- SecondMinActiveDRAMClockChangeMarginOneDisplayInVBLank = mode_lib->vba.ActiveDRAMClockChangeLatencyMargin[k];
|
|
+ for (k = 0; k < v->NumberOfActivePlanes; ++k) {
|
|
+ if (!((k == PlaneWithMinActiveDRAMClockChangeMargin) && (v->BlendingAndTiming[k] == k)) && !(v->BlendingAndTiming[k] == PlaneWithMinActiveDRAMClockChangeMargin) && v->ActiveDRAMClockChangeLatencyMargin[k] < SecondMinActiveDRAMClockChangeMarginOneDisplayInVBLank) {
|
|
+ SecondMinActiveDRAMClockChangeMarginOneDisplayInVBLank = v->ActiveDRAMClockChangeLatencyMargin[k];
|
|
}
|
|
}
|
|
|
|
- mode_lib->vba.TotalNumberOfActiveOTG = 0;
|
|
- for (k = 0; k < NumberOfActivePlanes; ++k) {
|
|
- if (BlendingAndTiming[k] == k) {
|
|
- mode_lib->vba.TotalNumberOfActiveOTG = mode_lib->vba.TotalNumberOfActiveOTG + 1;
|
|
+ v->TotalNumberOfActiveOTG = 0;
|
|
+ for (k = 0; k < v->NumberOfActivePlanes; ++k) {
|
|
+ if (v->BlendingAndTiming[k] == k) {
|
|
+ v->TotalNumberOfActiveOTG = v->TotalNumberOfActiveOTG + 1;
|
|
}
|
|
}
|
|
|
|
- if (mode_lib->vba.MinActiveDRAMClockChangeMargin > 0) {
|
|
+ if (v->MinActiveDRAMClockChangeMargin > 0) {
|
|
*DRAMClockChangeSupport = dm_dram_clock_change_vactive;
|
|
- } else if (((mode_lib->vba.SynchronizedVBlank == true || mode_lib->vba.TotalNumberOfActiveOTG == 1 || SecondMinActiveDRAMClockChangeMarginOneDisplayInVBLank > 0) && PrefetchMode == 0)) {
|
|
+ } else if (((v->SynchronizedVBlank == true || v->TotalNumberOfActiveOTG == 1 || SecondMinActiveDRAMClockChangeMarginOneDisplayInVBLank > 0) && PrefetchMode == 0)) {
|
|
*DRAMClockChangeSupport = dm_dram_clock_change_vblank;
|
|
} else {
|
|
*DRAMClockChangeSupport = dm_dram_clock_change_unsupported;
|
|
}
|
|
|
|
FullDETBufferingTimeYStutterCriticalPlane = FullDETBufferingTimeY[0];
|
|
- for (k = 0; k < NumberOfActivePlanes; ++k) {
|
|
+ for (k = 0; k < v->NumberOfActivePlanes; ++k) {
|
|
if (FullDETBufferingTimeY[k] <= FullDETBufferingTimeYStutterCriticalPlane) {
|
|
FullDETBufferingTimeYStutterCriticalPlane = FullDETBufferingTimeY[k];
|
|
- TimeToFinishSwathTransferStutterCriticalPlane = (SwathHeightY[k] - (LinesInDETY[k] - LinesInDETYRoundedDownToSwath[k])) * (HTotal[k] / PixelClock[k]) / VRatio[k];
|
|
+ TimeToFinishSwathTransferStutterCriticalPlane = (SwathHeightY[k] - (LinesInDETY[k] - LinesInDETYRoundedDownToSwath[k])) * (v->HTotal[k] / v->PixelClock[k]) / v->VRatio[k];
|
|
}
|
|
}
|
|
|
|
- *StutterExitWatermark = SRExitTime + ExtraLatency + 10 / DCFCLKDeepSleep;
|
|
- *StutterEnterPlusExitWatermark = dml_max(SREnterPlusExitTime + ExtraLatency + 10 / DCFCLKDeepSleep, TimeToFinishSwathTransferStutterCriticalPlane);
|
|
+ v->StutterExitWatermark = v->SRExitTime + ExtraLatency + 10 / DCFCLKDeepSleep;
|
|
+ v->StutterEnterPlusExitWatermark = dml_max(v->SREnterPlusExitTime + ExtraLatency + 10 / DCFCLKDeepSleep, TimeToFinishSwathTransferStutterCriticalPlane);
|
|
|
|
}
|
|
|
|
--
|
|
cgit 1.2.3-korg
|
|
`},
|
|
},
|
|
|
|
Flag: TExclusive,
|
|
}, &MakeHelper{
|
|
OmitDefaults: true,
|
|
SkipConfigure: true,
|
|
|
|
// Build, install, and boot kernel before running kselftest on it.
|
|
SkipCheck: true,
|
|
|
|
Make: []string{
|
|
"-f /usr/src/kernel/Makefile",
|
|
"O=/tmp/kbuild",
|
|
|
|
"LLVM=1",
|
|
"KBUILD_BUILD_VERSION='1-Rosa'",
|
|
"KBUILD_BUILD_TIMESTAMP='2106-02-07 06:28:15 UTC'",
|
|
"KBUILD_BUILD_USER=kbuild",
|
|
"KBUILD_BUILD_HOST=localhost",
|
|
"all",
|
|
},
|
|
Install: `
|
|
make \
|
|
"-j$(nproc)" \
|
|
-f /usr/src/kernel/Makefile \
|
|
O=/tmp/kbuild \
|
|
LLVM=1 \
|
|
INSTALL_PATH=/work \
|
|
install \
|
|
INSTALL_MOD_PATH=/work \
|
|
modules_install
|
|
rm -v /work/lib/modules/` + kernelVersion + `/build
|
|
`,
|
|
},
|
|
Flex,
|
|
Bison,
|
|
M4,
|
|
Tar,
|
|
Perl,
|
|
BC,
|
|
Sed,
|
|
Gawk,
|
|
Coreutils,
|
|
Diffutils,
|
|
Python,
|
|
|
|
XZ,
|
|
Zlib,
|
|
Gzip,
|
|
Bzip2,
|
|
Zstd,
|
|
Kmod,
|
|
Elfutils,
|
|
OpenSSL,
|
|
UtilLinux,
|
|
KernelHeaders,
|
|
), kernelVersion
|
|
}
|
|
func init() {
|
|
artifactsM[Kernel] = Metadata{
|
|
f: Toolchain.newKernel,
|
|
|
|
Name: "kernel",
|
|
Description: "the generic Rosa OS linux kernel",
|
|
Website: "https://kernel.org/",
|
|
|
|
ID: 375621,
|
|
}
|
|
}
|
|
|
|
func (t Toolchain) newGenInitCPIO() (pkg.Artifact, string) {
|
|
return t.New("gen_init_cpio-"+kernelVersion, 0, nil, nil, nil, `
|
|
mkdir -p /work/system/bin/
|
|
cc -o /work/system/bin/gen_init_cpio /usr/src/linux/usr/gen_init_cpio.c
|
|
`, pkg.Path(AbsUsrSrc.Append("linux"), false, kernelSource)), kernelVersion
|
|
}
|
|
func init() {
|
|
artifactsM[GenInitCPIO] = Metadata{
|
|
f: Toolchain.newGenInitCPIO,
|
|
|
|
Name: "gen_init_cpio",
|
|
Description: "a program in the kernel source tree for creating initramfs archive",
|
|
}
|
|
}
|